The invention relates to the area of digital logic circuits in general an to the area of programmable logic arrays in particular. The invention disclosed herein is that of a functionally new logic array capable of directly implementing circuits specified with Petri nets (a means similar to finite state machines for specification of digital systems, but more powerful than state machine particularly in specifying parallel processing and asynchronous digital logic circuits). The array is capable of both synchronous and asynchronous operation.
In comparison with asynchronous digital systems implemented with the disclosed logic array have the advantage that they can be analyzed for logic of prior art, the systems implemented with correctness of operation using the vast theoretical results which have been obtained for analyzing Petri nets. A very important characteristic of the disclosed logic array is that the Petri net specification of the digital system is faithfully realized by the implementation in the array. The correctness of the digital system can therefore be completely analyzed by analyzing the Petri net specification and thus eliminate the need for electronically testing the implemented digital systems.